Digital Core Design

The Power of Intellectual Property


The DHDLC is the HDLC/SDLC controller used for supporting CPU in range of controlling HDLC/SDLC transmission frame. The IP core has been designed to be used with great variety of microcontrollers, no matter if it’s 8-, 16- or 32-bit. It allows to control the frame on level of bits and flags, control frame errors, recognize and insert address byte(s), buffer received or transmitted data in separated FIFOs. The DHDLC has a capability to configure many HDLC/SDLC frame features like number of address bytes, CRC, flags insertion, idle detection, pad filling, NRZI coding, etc. It allows to use the IP Core in many different applications. Our trustworthy Core has also configurable interrupt output which is driven by frame and control events. What does it mean for you? Time is money, so thanks to the DHDLC IP Core you can save MCU time wasted for handling HDLC/SDLC frames.

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