D6802

The D6802 is an 8-bit MPU IP Core – synthesizable and fully compatible with the Motorola MC6802. It can be used as a direct replacement for the MC6802 Microprocessor. Two software-controlled power-saving modes – WAIT and HALT are available to preserve additional power. These modes make the D6802 IP Core especially attractive for automotive and battery-driven applications. It is fully customizable – delivered in the exact configuration, to meet your requirements. There is no need to pay extra for unused features and wasted silicon. The D6802 comes with a fully automated test bench with a complete set of tests, allowing easy package validation at each stage of the SoC design flow. Each DCD’s D68XX Core has built-in support for a proprietary Hardware Debug System – DoCD™. It is a real-time hardware debugger that provides debugging capability of a whole System-on-Chip (SoC). Unlike other on-chip debuggers, the DoCD™ provides non-intrusive debugging of running applications. It can halt, run, step into or skip instruction and read/write any contents of the microprocessor.

DESIGN FEATURES:

ALL DCD’S IP CORES ARE TECHNOLOGY INDEPENDENT WHICH MEANS THAT THEY ARE 100% COMPATIBLE WITH ALL FPGA & ASIC VENDORS E.G.

• Altera / Intel,
• Xilinx / AMD,
• Lattice,
• Microsemi / Microchip,
  and others.

• TSMC
• UMC
• SK Hynix
  and others.

• Cycle compatible with original implementation
• Software compatible with MC6802 industry standard
• De-multiplexed Address/Data Bus, to allow easy memory connection
• Two power saving modes: HALT, WAIT
• Fully synthesizable
• Static synchronous design
• No internal reset generator or gated clock
• Scan test ready
• USB, Ethernet, I2C, SPI, UART, CAN, LIN, HDLC, Smart Card interfaces available