DI2S

DI2S IP Core – Flexible I2S / PCM / TDM Audio Interface for FPGA & ASIC

The DI2S IP Core from DCD-SEMI is a versatile audio interface controller designed to connect microprocessors and SoCs to audio peripherals using I2S, left/right justified, PCM, or TDM protocols. Delivered as a scalable bridge to APB, AHB, and AXI bus architectures, DI2S enables high-performance audio data streaming in modern FPGA and ASIC designs.

Thanks to its flexible configuration, the DI2S core can operate as:

• Receiver or transmitter

• Master or slave

The core also allows customizable channel length, sample size, and audio block configuration, making it highly adaptable to embedded audio processing, digital signal processing (DSP), and multi-channel audio systems.

Key Features

• Universal audio protocol support: I2S, PCM, TDM, left/right justified

• Flexible operation: Master/slave, transmitter/receiver

• Configurable channel and sample width: Supports multiple audio formats

• Customizable audio blocks: Optimize for area, power, and performance

• Bus interfaces: APB, AHB, AXI for seamless SoC integration

Typical Applications

• Embedded audio processing systems

• Multi-channel DSP and audio codec interfacing

• Consumer electronics (headphones, soundbars, smart speakers)

• Automotive infotainment and in-car audio

• FPGA and ASIC audio subsystems

ALL DCD’S IP CORES ARE TECHNOLOGY AGNOSTIC, ENSURING 100% COMPATIBILITY WITH ALL FPGA AND ASIC VENDORS.

For further details, email info@dcd-semi.com.

• Configurable number of independent audio modules with their respective FIFO
• Configurable TX/RX mode of each audio module
• Configurable master/slave mode support of each audio module
• Flexible I2S, LSB/MSB (right/left) justified, DSP, TDM modes support
• Configurable sample size (8, 10, 16, 20, 24, 32 bit)
• Configurable number of samples per frame (1 to 16)
• Configurable FIFO depth
• Flexible FIFO threshold interrupt control
• FIFO Underrun/overrun interrupt
• Inter modules clock synchronization
• Available system interface wrappers:
  • AMBA – APB / AHB / AXI Bus
  • Altera Avalon Bus
  • Xilinx OPB Bus