Avisonic Chooses DCD’s DP8051 for Image Processors

The Challenges

1. Providing ultra-high speed, best quality and performance DP8051 IP Core

2. DoCD^TM debugging system with real-time and non-intrusive debugging ability

3. Professional technical support at each stage of the solution implementation

IP Solutions

DoCD

Benefits

Who can describe the profits of the cooperation better than the satisfied customer himself? Please see Avisonic’s testimonial below:

“…creating the world’s smallest integrated image processor for surveillance system, was not without its challenges; however, both design and debug have gone remarkably smooth, thanks in part to the products and support from DCD. We went to an FPGA first, to test out the system and the embedded debugging features made a huge difference. We then had real confidence as we went forward to high-volume ASIC production.”

David Hsia
Assistant Director, Marketing & Sales Division, Avisonic Technology Corp.

Overview

Avisonic R&D teams have accumulated years of expertise on product design and technical innovation skills and developed state of art digital image-process chips for Japanese companies. The achievements make Avisonic thrive as one of the worldwide leading total solutions company on image process systems area.  In 2010, the company has presented the AVS7201 – the world’s first ASIC, that enables 360o, all-round view with fisheye lens distortion correction. This mega-pixel image processor which enables electronic pan, tilt, and zoom (ePTZ), can be used in surveillance, teleconference, security, and other similar camera systems equipped with fisheye lenses. Close cooperation of both – Avisonic and Digital Core Design Engineering teams – has  helped to achieve this extraordinary and innovative solution. The provided DP 8051 IP Core is an ultra-high performance, speed optimized soft core, of a single-chip 8-bit embedded controller, intended to operate with fast (typically on-chip) and slow (off-chip) memories. It has a Pipelined RISC architecture and executes 120-300 million instructions per second. Dhrystone 2.1 benchmark program runs from 11.46 to 15.55 times faster, than the original 80C51 at the same frequency. The DP8051 is provided with fully automated test bench and complete set of tests, what allows easy package validation, at each stage of SoC design flow. Another immense advantage of DCD’s 8051 Core is the built-in support for the DCD Hardware Debug System, called DoCD^TM. It provides debugging capability of a whole System-on-chip (SoC) and consists of three major blocks: Debug IP Core, Hardware Assisted Debugger and Debug Software. The DoCD^TM delivers some serviceable features, such as real-time and non-intrusive debugging, pre-silicon validation and post-silicon, on-chip software debugging. It allows hardware breakpoints, trace, variables watch and multi C sources debugging. The DoCD^TM Debug Software can work as a hardware debugger, as well as a software simulator – some tasks can be validated at software simulation level and after this step, you can continue real-time debugging, by uploading code into silicon. The reason for the development of the DoCD^TM, was to provide our customers with the ability of easy system verification and software debugging, at no additional charges. Therefore, the complete debug system is built into each 8051/80251/80390 IP Core, free of charge.

We do believe in Power of Innovation and creating solutions for projects like Avisonic’s and assistance in their implementation, confirms our belief, that Impossible is Nothing!

“We are very happy with the performance of the DCD DP8051. Our experience with DCD in terms of both product quality and support has led us to rely on them for quality IP core products.

David Hsia
Assistant Director,
Marketing & Sales Division,
Avisonic Technology Corp.