Digital Core Design, IP Core and SoC design laboratories from Poland have introduced the newest version of the Motorola’s 68000 16/32-bit microprocessor. D68000 is the industry’s low cost 32-bit MCU, offering not only a low cost entry point but also effective performance. Improved architec-ture enables this IP Core to run with uCLinux, so it can be  easily used as HTTP server or FTP client.

The D68000 is 100% compatible with original Motorola’s 68000 and as a proof, just to mention, that a test run on classic Amiga 500+ computer showed clearly that DCD’s CPU can be 1:1 replacement for original chip. But classic computers are not the target destination for the product, cause improved architecture, creates new possibilities. D68000 runs with uCLinux Operating System, which makes this IP Core interesting solution for embedded servers, certified to be used only with m68k processors. The BOA application is used as HTTP server and effective communication could be established through FTP protocol. uCLinux is a MMU‐less derivative of Linux Operating System adopted for embedded solutions. It provides all of the Linux benefits including superior stability, Common Linux Kernel API, multitasking, full featured TCP/IP networking, Virtual File System and reduces the amount of memory needed by its kernel and running applications [it utilizes just 400kB].
To make implementation process even easier DCD’s solution is delivered with fully automated test-bench and complete set of tests, which allow easy package validation at each stage of SoC design flow.  – We have built special testing platform to run D68000 with uCLinux Operating System – explains Jacek Hanke, President of Digital Core Design – And to make this IP Core more user friendly, it’s being equipped with DoCD-BDM hardware debugger.
New IP Core from DCD is a technology independent solution, which enables any engineer to imple-ment it in either Altera, Asic, Lattice or Xilinx technology. Of course D68000 is binary-compatible with m68k family of microprocessors, more over – DCD’s D68000 has a 16-bit data bus and a 24-bit address data bus. Its code is compatible with the MC68008, upward code compatible with the MC68010 virtual extensions and the MC68020 32-bit implementation of the architecture. The difference lies in improved instructions set, which allows to execute a program with a higher performance, than the standard 68000 core can offer. MULS, MULU take just 28 clock periods, the same as DIVS, DIVU. Optimized shifts and rotations, combined with shorter effective address calculation time and removed idle cycles make this IP Core much more power efficient.
To complement the D68000 offer, it’s being developed with DoCD-BDM hardware debugger, which provides debugging capability not only for the IP Core, but for the whole SoC system. DCD’s debug-ger is 100% compatible with BDM debug interfaces, working smoothly with its interfaces/cables: Public Domain cable, Macraigor Wiggler and P&E BDM cable. DoCD’s also fully supported by stand-ard debugging tools like GNU GD8 debugger, Cosmic ZAP debugger and Tasking debugger.