Digital Core Design, an IP Core and System on Chip design house from Poland, has intro-duced its newest I2C Bus Interface soft core. It is fully compatible with Philips v. 3.0 spec-ification, which means it can operate at Standard, Fast, Fast Plus and High Speed (up to 3,4 Mb/s). Moreover DI2CMS allows master, slave mode, arbitration and clock synchro-nization, support for multi-master systems, 7-bit and 10-bit addressing formats on the I2C bus and some other valuable features.

DI2CMS provides an interface between a microprocessor or microcontroller and an I2C bus. It can work as a master or a slave transmitter/receiver – depending on a working mode, determined by the MCU. DCD’s IP Core conforms to the latest I2C v. 3.0 specification, implementing useful features like:

  • Master & Slave operation [support for all speeds: Standard, Fast, Fast Plus, High Speed]
  • Arbitration and clock synchronization
  • Support for multi-master systems
  • Support for both 7-bit and 10-bit addressing formats
  • User-defined timings [data setup, start setup, start hold and others]
  • Simple interface with support for: AMBA – APB Bus, Altera – Avalon Bus, Xilinx – OPB Bus
  • Interrupt generation and more…

The DI2CMS is technology independent, that’s why a VHDL or VERILOG design can be implemented in a variety of process technologies. – Basing on 14 years market experience, we’ve wanted to design I2C IP Core, which will offer maximal functionality – says Piotr Kandora, VCEO, Director of R&D in Digital Core Design – That’s why DI2CMS implements almost all available functions, so it can be completely customized in accordance to the customer’s needs.
Digital Core Design’s family of I2C IP Cores consists of: DI2CM, DI2CS, DI2CSB and mentioned above DI2CSM. Depending on the target application they can work as a master, slave, base or master/slave. DI2CM –I2C Bus controller Master – realizes master communication between a microprocessor/microcontroller and an I2C Bus. It allows operations as the I2C master transmitter and the I2C Master receiver. DI2CS – I2C Bus controller Slave – realizes slave communication between a microprocessor/microcontroller and an I2C Bus. It allow operations as the I2C Slave receiver and the I2C Slave transmitter. And last but not least DI2CSB – I2C Bus controller Slave – base version – realizes communication between an I2C Bus and a passive devices, like LCD drivers, memories etc.

More information & data sheet: