D8255

D8255 IP Core — Programmable I/O Controller for Embedded Systems

Versatile I/O Device Compatible with Intel CPUs and Beyond

The D8255 IP Core from DCD-SEMI is a programmable input/output (I/O) device designed for use with Intel CPUs and compatible with most other microprocessors. This innovative IP Core offers 24 programmable I/O pins, divided into two groups of 12 pins, and supports three major operating modes for maximum flexibility in embedded system designs.

Operating Modes

MODE 0 — Basic Input/Output

Provides simple input and output operations without handshaking. Data can be written to or read from specified ports.
Key Features:

• Two 8-bit ports and two 4-bit ports

• Any port configurable as input or output

• 16 possible I/O configurations

MODE 1 — Strobed Input/Output

Enables handshaking for transferring data to or from a specified port using control signals.
Key Features:

• Two groups: Group A and Group B

• Each group contains one 8-bit data port and one 4-bit control/data port

• Inputs and outputs are latched

• 4-bit port manages control and status of the 8-bit data port

MODE 2 — Strobed Bidirectional Bus I/O

Provides bidirectional communication on a single 8-bit bus with handshaking signals and interrupt capabilities.
Key Features:

• Applicable to Group A only

• One 8-bit bidirectional bus port (Port A) and one 5-bit control port (Port C)

• Port C manages control and status of the 8-bit bus port

• Supports interrupt generation with enable/disable functions

Technology-Independent and Software-Configurable

The D8255 IP Core is fully programmable via system software, eliminating the need for external logic to interface with peripheral devices. Its technology-independent design makes it ideal for FPGA, ASIC, and SoC implementations, providing a flexible and reliable I/O solution for modern embedded systems.

Why Choose DCD-SEMI D8255 IP Core

• 24 programmable I/O pins, split into two groups

• Supports three operating modes: Basic I/O, Strobed I/O, and Bidirectional Bus I/O

• Handshaking and interrupt support for advanced system control

• Fully software-configurable, no external logic needed

• Technology-independent design suitable for FPGA, ASIC, and SoC integration

• Ideal for microprocessor-based embedded systems and peripheral interfacing

ALL DCD’S IP CORES ARE TECHNOLOGY AGNOSTIC, ENSURING 100% COMPATIBILITY WITH ALL FPGA AND ASIC VENDORS.

For technical specifications, integration support, or customization options, contact info@dcd-semi.com

• Compatible with industry standard 8255
• 24 I/O lines individually programmed
  in 2 groups of 12:
  • Group A – Port A and upper half of Port C
  • Group B – Port B and lower half of Port C
• 3 major modes of operation
  • Mode 0 – Basic input/output
  • Mode 1 – Strobed Input/output
  • Mode 2 – Bi-directional Bus
• Control Word Read-Back Capability
• Direct Bit Set/Reset Capability
• Interrupt control functions
• No internal three states busses
• Fully synthesizable, technology independent source code.