DAES XTS

DAES XTS - cryptographic co-processor for lightweight cryptography

DAES XTS IP Core — Compact Hardware AES-XTS Accelerator

The DAES XTS IP Core from Digital Core Design is a high-performance, compact cryptographic co-processor engineered to implement the Rijndael (AES) algorithm in XTS mode, fully compliant with FIPS 197 and IEEE Std 1619-2007 standards. Designed for IoT, embedded devices, and security-critical applications, it delivers efficient, hardware-based encryption for FLASH, RAM, and other memory blocks, ensuring robust protection for sensitive data.

Optimized for Secure Memory Encryption

The DAES XTS IP Core is tailored for disk and memory encryption, supporting random data access across memory blocks. Its hardware implementation provides superior performance, lower latency, and enhanced security compared to software-only AES solutions, making it ideal for:

• IoT and edge devices

• Embedded systems with encrypted storage

• Cloud servers and high-assurance computing environments

⚠️ Note: Ciphertext-Stealing mode is not currently supported. Memory sectors must be aligned to multiples of 128-bit blocks.

Seamless Integration and Versatility

The DAES XTS IP Core can easily integrate with SPI memory controllers and other standard interfaces, enabling fast deployment across a wide range of hardware platforms. Its lightweight, energy-efficient design ensures minimal silicon footprint without compromising cryptographic throughput or system performance.

With DAES XTS, engineers gain a robust, reliable, and standards-compliant solution for AES-based memory encryption—perfect for applications that demand high security, efficiency, and scalability.

Key Features

• AES encryption in XTS mode (FIPS 197, IEEE 1619-2007)

• Optimized for FLASH, RAM, and memory blocks

• Hardware-based co-processor for maximum performance

• Lightweight design with minimal silicon footprint

• Compatible with SPI memory controllers for versatile integration

Elevate your device security with the DAES XTS IP Core, delivering high-speed AES encryption tailored for modern embedded and IoT systems.

The DAES XTS is an ideal choice for security-conscious environments, ranging from IoT devices to cloud servers, owing to the widespread adoption of the AES block cipher. Its hardware-based implementation offers substantial advantages in both security and performance compared to software-based alternatives. It is important to note that Ciphertext-Stealing mode is currently not supported; therefore, the DAES XTS expects memory sectors to be aligned to multiples of 128-bit blocks.

Furthermore, seamless integration is possible with a diverse array of SPI memory controllers, enhancing the versatility and compatibility of the DAES XTS for a wide range of applications. Elevate your security measures with this lightweight yet powerful cryptographic solution.

ALL DCD’S IP CORES ARE TECHNOLOGY AGNOSTIC, ENSURING 100% COMPATIBILITY WITH ALL FPGA AND ASIC VENDORS.

For further details, email info@dcd-semi.com

• Support AES‐XTSmode—IEEE Std 1619‐2007 standard compliance
• Support 128 and 256‐bit key size
• Random memory block access support
• Internal key expansion module
• Minimal resource usage for embedded systems
• Optional embedded memory interface ready wrapper