DQ80251

DQ80251 – World’s Fastest 8051/80251 Soft Core CPU

The DQ80251 is a quad-pipelined, ultra high-performance 16-bit/32-bit soft core that redefines what’s possible for 8051/80251 microcontrollers. Built on 20 years of DCD’s 8051 expertise, it introduces a brave new world of speed, efficiency, and configurability compared to the original 8051/80251 architecture.

Why DQ80251 is Revolutionary

• World’s Fastest 8051/80251 CPU:
  Runs the Dhrystone 2.1 benchmark 75× faster than the original 80C51 and 6× faster than the 80C251, making it unmatched in the industry.

• Brave New World in Performance & Efficiency:

  • SOURCE mode delivers native 80C251 instructions with 2× smaller compiled code than standard 8051 code.

  • Ultra-low power operation allows the core to run 50× slower clocks with no performance loss, ideal for battery-powered and IoT devices.

• Dual Working Modes:

  • BINARY Mode: Executes existing 80C51 compiled code seamlessly.

  • SOURCE Mode: Leverages the full performance of DQ80251 instructions for modern SoC designs.

• DoCD™ On-Chip Debugger:
  Built-in, configurable DoCD-JTAG debugger allows real-time, non-intrusive debugging of running SoC applications:

  • Halt, run, step into/over instructions

  • Read/write registers, internal/external memory, SFRs, and custom peripherals

• Fully Configurable & Scalable:
  Select features and peripherals to create dedicated, SoC-ready systems, including multi-core designs.

• Legacy Compatible:
  100% binary-compatible with 16-bit 80C251 and 8-bit 80C51 microcontrollers for smooth migration of legacy applications.

• Verification-Ready:
  Delivered with a fully automated test bench and complete test suite, ensuring easy integration and validation in SoC designs.

Applications & Advantages

The DQ80251 offers a quantum leap over traditional 8051/80251 cores, enabling:

• IoT & connected devices with low power and high performance

• Industrial & embedded systems requiring high reliability and speed

• Legacy system migration with improved performance and reduced memory footprint

With the DQ80251, engineers gain the ultimate combination of speed, efficiency, and flexibility, creating a new benchmark for 8051/80251 cores worldwide.

Watch the DQ80251 presentation on DCD’s YouTube:

ALL DCD’S IP CORES ARE TECHNOLOGY AGNOSTIC, ENSURING 100% COMPATIBILITY WITH ALL FPGA AND ASIC VENDORS.

For further details, email info@dcd-semi.com.

• 100% binary compatible with industry standard 80C251, implementing BINARY and SOURCE modes
• Single clock period per most of instructions
• Quad-Pipelined architecture enables to run 75 times faster than the original 80C51 and 6 times faster, than the 80C251 at the same frequency
• Up to 75.08 VAX MIPS ratio
• Up to 8M bytes of Program Memory
• Up to 32k bytes of internal (on-chip) Data Memory
• Up to 8M bytes of external (off-chip) Data Memory
• Up to 16 MB of total memory space for CODE and DATA
• 32k bytes of extended stack space
• User programmable Program Memory Wait States solution – for wide range of memories’ speed
• User programmable Extended Data Memory Wait States solution – for wide range of memories’ speed
• De-multiplexed Address/Data bus, to allow easy connection to memory
• Full Program Memory writes
• Interface for additional Special Function Registers
• Fully synthesizable
• Static synchronous design
• No internal tri-states
• Scan test ready
• USB, Ethernet, I2C, SPI, UART, CAN, LIN, HDLC, Smart Card interfaces available