8-bit FAST Microcontroller
The DF6811K is an advanced 8-bit MCU IP Core with highly sophisticated, on-chip peripheral capabilities. DCD’s soft core is binary-compatible with industry-standard Motorola 68HC11K 8-bit microcontroller. It has an improved FAST architecture – approximately 4 times faster compared to the original implementation. In the standard configuration, the core has major peripheral functions integrated on-chip. The Core can be provided in configurations that match the following microcontrollers:
There are two serial interfaces: an asynchronous serial communications interface (SCI) and a separate synchronous serial peripheral interface (SPI). The main 16-bit, free-running timer system has three input capture lines, five output-compare lines, and a real-time interrupt function. An 8-bit pulse accumulator subsystem can count external events or measure external periods. Self-monitoring circuitry is included on-chip to protect against system errors. The Computer Operating Properly (COP) watchdog system protects against software failures. An illegal opcode detection circuit provides a non-maskable interrupt if an illegal opcode is detected. Two software-controlled power-saving modes – WAIT and STOP are available to save additional power. These modes make the DF6811K IP Core especially attractive for automotive and battery-driven applications. The DF6811K Microcontroller Core can be equipped with the ADC Controller, allowing the use of an external ADC Controller with standard ADC software. The ADC Controller makes external ADCs visible as internal ADCs in original 68HC11K Microcontrollers. The core is fully customizable – delivered in the exact configuration to meet users’ requirements. There is no need to pay extra, for unused features and wasted silicon. It includes a fully automated test bench with a complete set of tests, allowing easy package validation at each stage of the SoC design flow. Each DCD’s DF68XX Core has built-in support for a proprietary Hardware Debug System called DoCD™ – a real-time hardware debugger that provides debugging capability of a whole System-on-Chip (SoC). Unlike other on-chip debuggers, the DoCD™ provides non-intrusive debugging of the running application. It can halt, run, step into or skip an instruction, and read/write any contents of the microcontroller, including all registers, and SFRs, including user-defined peripherals, data, and program memories.
ALL DCD’S IP CORES ARE TECHNOLOGY INDEPENDENT WHICH MEANS THAT THEY ARE 100% COMPATIBLE WITH ALL FPGA & ASIC VENDORS E.G.
- Altera / Intel,
- Xilinx / AMD,
- Microsemi / Microchip,
- SK Hynix
- FAST architecture – 4 times faster than the original implementation
- Software compatible with 68HC11 industry standard
- 10 times faster multiplication
- 16 times faster division
- 256 bytes of remapped System Function Registers space (SFRs)
- De-multiplexed Address/Data Bus, to allow easy memory connection
- Core can also be used without I/O wrapper, so each peripheral functions pins will be separated from I/O ports lines.
- Two power saving modes: STOP, WAIT
- Ready pin allows Core to operate with slow program and data memories.
- Fully synthesizable
- Static synchronous design
- No internal reset generator or gated clock
- Positive edge clocking and no internal tri-states
- Scan test ready
- 1 GHz of virtual clock frequency, compared to original implementation
- USB, Ethernet, I2C, SPI, UART, CAN, LIN, HDLC, Smart Card interfaces available
|IP Core||Architecture type||Memory space||DoCD||UART (SCI)||SPI M/S||IO Ports||Watchdog Timer||Timer||Compare / Capture||Pulse accumulator||READY pin||Chip Selects||Gatecount|
Power of Innovation is our primary target. That’s why our R&D focuses on every IP Core detail. As a result of that concern, some unique solutions were born. One of them is the D68XX on-Chip Debugger (DoCD™) which is a complete debugging system, dedicated for all 68XX Cores offered by DCD.Read more
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