Description

DF6808 8-bit MCU IP Core – High-Performance, Fully Customizable 68HC08 Compatible

The DF6808 is a high-performance 8-bit MCU IP Core with advanced on-chip peripheral capabilities, fully binary-compatible with the Motorola 68HC08 8-bit microcontroller. Leveraging DCD’s FAST architecture, the DF6808 delivers up to 3.2× higher performance compared to the original 68HC08, achieving 45–100 million instructions per second, making it ideal for automotive, battery-powered, and industrial SoC applications.

The DF6808 is fully customizable, delivered in the exact configuration to meet project requirements, ensuring no wasted silicon or unused features. Its standard configuration includes major on-chip peripherals:

Key Features & Capabilities:

  • Dual Serial Interfaces: Full-duplex UART (SCI) and synchronous SPI for versatile communication.

  • 16-bit Free-Running Timer: Two input capture lines and two output-compare lines for precise timing.

  • Reliability & Safety: On-chip self-monitoring, COP watchdog, and illegal opcode detection with non-maskable interrupt.

  • Power Efficiency: WAIT and STOP software-controlled low-power modes for energy-sensitive designs.

  • Fully Automated Validation: Delivered with a complete test bench and verification suite for seamless SoC integration.

  • DoCD™ Hardware Debug Support: Built-in real-time debugger enabling non-intrusive SoC debugging of registers, program/data memory, SFRs, and user-defined peripherals.

The DF6808 IP Core combines high performance, low power, and advanced peripherals, making it perfect for automotive electronics, battery-powered embedded systems, and industrial SoCs.

Applications: Automotive, battery-driven embedded systems, industrial control, and general-purpose SoCs.

Feature / Core DF6802 DF6803 DF6805 DF6808
Core Type 8-bit MPU 8-bit MCU 8-bit MCU 8-bit MCU
Compatibility Motorola MC6802 Motorola MC6803 Motorola 68HC05 Motorola 68HC08
Performance Boost ~4× faster than MC6802 ~4× faster than MC6803 4.1× faster than 68HC05 3.2× faster than 68HC08
Instruction Speed N/A N/A 45–100 MIPS 45–100 MIPS
Serial Interfaces N/A SCI SCI (full-duplex) + optional SPI SCI (full-duplex) + SPI
Timer System N/A 16-bit 3-function timer 16-bit free-running, 2 input capture, 2 output compare 16-bit free-running, 2 input capture, 2 output compare
Power-Saving Modes WAIT, HALT WAIT WAIT, STOP WAIT, STOP
On-Chip Safety Features COP watchdog COP watchdog COP watchdog, illegal opcode detection COP watchdog, illegal opcode detection
ADC Support Optional Optional Optional Optional
Customizability Fully customizable Fully customizable Fully customizable Fully customizable
Automated Test Bench Yes Yes Yes Yes
Hardware Debug Support DoCD™ DoCD™ DoCD™ DoCD™
Ideal Applications Automotive, battery-driven SoCs Automotive, battery-driven SoCs Automotive, battery-driven embedded systems Automotive, battery-driven embedded systems

Short Summary:
The DF68XX family of 8-bit MCU and MPU IP Cores from DCD provides high-performance, fully customizable cores compatible with classic Motorola microcontrollers (MC6802, MC6803, 68HC05, 68HC08). Each core offers enhanced instruction speed, advanced on-chip peripherals, low-power modes, and DoCD™ real-time hardware debugging for seamless SoC integration. Ideal for automotive, battery-driven, and industrial embedded applications.

ALL DCD’S IP CORES ARE TECHNOLOGY AGNOSTIC, ENSURING 100% COMPATIBILITY WITH ALL FPGA AND ASIC VENDORS.

For further details, email info@dcd-semi.com

Key features

  • FAST architecture – 3.2 times faster than the original implementation
  • Software compatible with 68HC08 industry standard
  • Configurable Harvard or Von Neumann architectures
  • 11 times faster multiplication
  • 64 bytes of System Function Registers space (SFRs)
  • Up to 64K bytes of Data Memory
  • Up to 64K bytes of Code Memory
  • De-multiplexed Address/Data Bus to allow easy memory connection
  • Two power saving modes: STOP, WAIT
  • Ready pin allows Core to operate with slow program and data memories.
  • Fully synthesizable
  • Static synchronous design
  • No internal reset generator or gated clock
  • Positive edge clocking and no internal tri-states
  • Scan test ready
  • 800 MHz of virtual clock frequency compared to original implementation
  • USB, Ethernet, I2C, SPI, UART, CAN, LIN, HDLC, Smart Card interfaces available
IP Core Architecture type Memory space DoCD UART (SCI) SPI M/S IO Ports Watchdog Timer Timer Compare / Capture Pulse accumulator READY pin Chip Selects Gatecount
DF6808 fast 64k 4 1 2/2 - 8300
DF6805 fast 64k 4 1 2/2 - 7000
D6802 legacy 64k - - - - -
D6803 legacy 64k 4 1 + - 6000
DF6802 fast fast - - - - -
DF6803 fast 64k 4 1 + - -
DF6811F fast 64k 7 1 5/4 - 14000
DF6811E fast 64k 5 1 5/4 - 12000
DF6811K fast 1M 10 3 13/6 - 21000
D68HC11E legacy 64k 5 1 5/4 - 13000
D68HC11F legacy 64k 7 1 5/4 4 13500
D68HC11K legacy 1M 10 3 13/6 4 21000

Features

DoCD Debugger

Power of Innovation is our primary target. That’s why our R&D focuses on every single IP Core detail. As a result of that concern, some unique solutions were born. One of them is the D68XX on-Chip Debugger (DoCD™), which is a complete debugging system dedicated for all 68XX Cores offered by DCD.

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DoCD Debugger

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